Signal Temporal Logic
Noushin Mehdipour, Cristian Ioan Vasile, and Calin Belta. Average-based Robustness for Continuous-Time Signal Temporal Logic. In IEEE Conference on Decision and Control (CDC), Nice, France, December 2019.
Austin M Jones, Kevin Leahy, Cristian Ioan Vasile, Sadra Sadradinni, Zachary Serlin, Roberto Tron, and Calin Belta. Scalable and Robust Deployment of Heterogenenous Teams from Temporal Logic Specifications. In International Symposium on Robotics Research (ISRR), Hanoi, Vietnam, October 2019.
Noushin Mehdipour, Cristian Ioan Vasile, and Calin Belta. Arithmetic-Geometric Mean Robustness for Control from Signal Temporal Logic Specifications. In American Control Conference (ACC), Philadelphia, PA, USA, July 2019. doi:10.23919/ACC.2019.8814487.
Curtis Madsen, Prashant Vaidyanathan, Sadra Sadraddini, Cristian Ioan Vasile, Nicholas A. DeLateur, Ron Weiss, Douglas Densmore, and Calin Belta. Metrics for Signal Temporal Logic Formulae. In IEEE Conference on Decision and Control (CDC), pages 1542–1547, Miami Beach, FL, USA, December 2018. doi:10.1109/CDC.2018.8619541.
Cristian-Ioan Vasile, Vasumathi Raman, and Sertac Karaman. Sampling-based synthesis of maximally-satisfying controllers for temporal logic specifications. In IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), pages 3840-3847, Vancouver, BC, Canada, September 2017. doi:10.1109/IROS.2017.8206235.
Curtis Madsen, Prashant Vaidyanathan, Cristian-Ioan Vasile, Rachael Ivison, Junmin Wang, Calin Belta, and Douglas Densmore. Utilizing Signal Temporal Logic to Characterize and Compose Modules in Synthetic Biology. In International Workshop on Biodesign Automation (IWBDA), pages 25-26, Newcastle University, Newcastle upon Tyne, UK, August 2016. link.